Optimizing frequency synthesizer performance based on passive adder entrenched technique for 4G communication systems

Hussain K. Khleaf, Ali Kareem Nahar, Ansam S. Jabbar

Abstract


Noise in 4G communication systems is a pressing current problem. There are various ways to reduce phase noise. The sigma-delta passive adder entrenched (PAE) approach was chosen for the WCDMA system because it provides a spurious level, phase noise, and low stabilization time. Therefore, for WCDMA applications, this study proposes a frequency synthesizer. It is then suggested that the addition of a passive adder before the modulator's quantizer to eradicate any distortions created as a result of the quantization stage. The design factors for the suggested second order synthesizer for 4G are chosen based on the analytical results for all unit of the suggested system and in accordance with WCDMA specifications. The suggested PAE frequency synthesizer for the application of WCDMA reduces noise exact effectively, according to simulation findings. With this synthesizer, the in-band phase noise is -75 dBc/Hz. For frequency synthesizer simulation, MATLAB (R2020) is utilized.

Keywords


2nd order ΔΣ; Frequency synthesizer; Noise shaping; WCDMA

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DOI: https://doi.org/10.11591/eei.v11i2.3196

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Bulletin of EEI Stats

Bulletin of Electrical Engineering and Informatics (BEEI)
ISSN: 2089-3191, e-ISSN: 2302-9285
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).