Efficient Hardware Architecture for Cyclostationary Detector

Abstract

Cognitive radio is one of the modern techniques which is evolved for utilising the unused spread spectrum effectively in wireless communication. In cognitive radio system the foremost concept is sensing the holes (spaces) in the frequency spectrum allotted and it facilitates a way that how effectively and efficiently the bandwidth is used by finding the spectrum holes in a designated spectrum. There are various methods available for sensing the spectrum and one such a sensing method is cyclostationary detection.  The method of cyclostationary feature mainly focuses on detecting whether the primary user is present or absent. The threshold of a signal is calculated by cyclic cross-periodogram matrix of the corresponding signal to determine the presence of signal or noise. The difficulty in evaluating the targeted threshold is evaded by training an artificial neural network by extracted cyclostationary feature vectors which are obtained by FFT accumulation method. This paper proposes a hardware architecture for cyclostationary detection.