Comparison study of 8-PPM, 8-DPIM, and 8-RDH-PIM modulator FPGA hardware design in term of bandwidth efficiency and transmission rate

M. A. Ilyas, Maisara Othman, Rahmat Talib, R. Yahya, M. Yaacob, S. M. Mustam, M. B. Jaafar, C. B. M. Rashidi


In this paper, a performance study of 8-Pulse-Position Modulation (PPM), 8-Digital Pulse Interval Modulation (DPIM), and 8-Reverse Dual Header-Pulse Interval Modulation (RDH-PIM) implementation in Verilog hardware design language is presented. The hardware design is chosen over software design since it could provide much more flexibility in term of transmission rate and reduce the workload of the processor in the complete system. Using 50 MHz clock as the reference data clock speeds, the transmission rate recorded are 11.11 Msymbol/second or 33.33 Mbps, 9.09 Msymbol/s or 27.27 Mbps, and 6.25 Msymbol/s or 18.75 Mbps for 8-RDH-PIM, 8-DPIM, and 8-PPM respectively. We conclude that 8-RDH-PIM modulator design provides better performance in term of bandwidth utilization and transmission rate as compared to 8-PPM and 8-DPIM.


Digital Pulse Interval Modulation (DPIM); FPGA modulation design; Pulse-Position Modulation (PPM); Reverse Dual Header-Pulse Interval Modulation (RDH-PIM)

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Bulletin of Electrical Engineering and Informatics (BEEI)
ISSN: 2089-3191, e-ISSN: 2302-9285
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Universitas Ahmad Dahlan (UAD) and Intelektual Pustaka Media Utama (IPMU).