Simulation study of memristor aided logic (magic) based on CMOS NOR gate

Syed Abdul Mutalib Al Junid

Abstract


Memristor is a non-volatile new technology memory where the data stored as a resistance which the performance is influenced by the stateful logic design. Therefore, this study is an attempt to investigate the performance of the MAGIC NOR Gate stateful logic design using LTSPICE and targeted to 2 bits memory application. The objective of this project is to review the performance of memristor based stateful logic logic design and schematics. Furthermore, the study been carried out by implementing the MAGIC NOR gate stateful logic schematic, then simulate the design in order to see the effects of performance and electrical parameters compared to the others. At the end of this paper, evidently, the improvement of MAGIC NOR Gate contributes in reducing the number of NOR gate and CMOS count. Besides, the MAGIC NOR gates takes parallel inputs topology and eliminate the threshold voltage compared to IMPLY logic. Nevertheless, larger numbers of memristor required to stable the output consistency in MAGIC NOR gate schematic.


Keywords


NOR GATE; Memristor; CMOS; Logic Gate


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